The ÁMark-8 Project
Building a Mark-8 is an expensive and difficult project. This is partly
due to the large number of components, and the high cost of some of them,
particularly the memory and paddle switches. I thought it would be an
interesting project to make a simple (in terms of part count) and relatively
inexpensive version of the Mark-8 using modern technology and components for
everything except the 8008 itself.
The design incorporates the following ideas:
- Most of the logic, including all the front panel control, is implemented
in an FPGA. The LEDs are time-multiplexed, which reduces the number of
drivers and current requirements.
- RAM and ROM are supplied from modern high-density devices, with up to 16KB
of either (for a total of 16KB), depending on the FPGA programming.
Actually, since there is actually 32KB of RAM and 2MB of ROM (due to
components I had on hand), bank switching could be implemented if desired.
- Physically, all the surface mount components, excepting a few LEDs, are
hidden on the back side of the board.
- Instead of paddle switches, the front panel controls are momentary
pushbuttons with visual feedback for those which have a state (corresponding
to up or down positions). The reasons for this choice are that the
switches are smaller but easy to use, they are less expensive, and it allows
for PC control of the board.
- A PC interface that connects to the parallel port allows for full control
of the front panel. This can be used to download and upload memory
data, or run the computer from an IDE on the PC in a kind of an ICE mode.
- The power supplies are on board, requiring only a 9VAC 'wall wart'.
A commercial power supply supplying +5 and -12VDC is bulky or hard to find,
whereas a simple transformer module can easily be found. The power
requirement is a few hundred mA.
Front side, component positions and silkscreen. Actual size is
6.3" x 3.9" (Eurocard 100 x 160 mm).
The pushbuttons are ITT type D6, the larger LEDs are T1-3/4 clear case red
(to match the original), the status LEDs for the buttons are SMT. The side
connectors are just 0.1" pin headers soldered onto the board on both sides;
the 'To PC' one goes to the PC's parallel port via a straight cable.
Back side, components (reversed "look-through-top" view)
The bottom-most chip (the FPGA configuration PROM) is going to be changed to
DIP-8, as I found a stock of Atmel EEPROMs in that form factor. The DIP-8
will be surface mounted by folding its legs up so it doesn't go through to the
UI side of the board.
Current schematic (Eagle)
Current board (Eagle)